1. Field of the Invention
The present invention relates to a semiconductor device and method of manufacturing the same. In particular, it relates to a semiconductor device and method of manufacturing the same using the so-called sidewall transfer process to etch an etching target member.
2. Description of the Related Art
In a semiconductor manufacturing process to form a wiring pattern (line-and-space), generally, a photolithography mask is used to develop a resist to transfer the pattern to the resist, which is then used as a mask to etch an etching target member.
As semiconductor devices have been fine-patterned in recent years, EEPROMs with a reduced number of bit lines and drain contacts have been proposed (see, for example, Patent Document 1: JP 2-74069A). Associated with the reduced number of bit lines and drain contacts, there are technologies for solving the problem about injection of electrons (failed write) due to occurrences of electron-hole pairs in a Si substrate (see, for example, Patent Document 2: JP 6-275800A).
The technologies as in the above Patent Documents 1, 2 require a semiconductor device that allows a common contact to be formed in a set of two source/drain diffusion layer portions (semiconductor layer portions). Such the common contact-formable semiconductor device is structured to have H-shaped source/drain diffusion layer portions partly connected seen from above.
Formation of the above H-shaped source/drain diffusion layer portions leaves a problem associated with the lithography resolution limit caused in accordance with downsizing of semiconductor devices. Specifically, if a contact fringe is formed in a portion of source/drain diffusion layer portions aligned at a smallest pitch, the interval between contact fringes in adjacent source/drain diffusion layer portions can not be formed by the lithography at a sufficient resolution. In this case, the interval becomes narrow, which may establish a short circuit possibly. An etching also can not form the interval. In a word, the above problem lowers the yield as well.
In the method of forming a contact at the center of two diffusion layer portions as disclosed in the Patent Document 2, the contact area between the source/drain diffusion layer portion and the contact is small. Therefore, it causes an increase in contact resistance as a problem. If the contact is shifted to one side by misalignment or the like, an open failure may arise.
On the other hand, there is a technology for forming a pattern below the lithography resolution limit using the so-called sidewall transfer process. The use of this technology to form source/drain diffusion layer portions and form a contact fringe spanning two source-drain diffusion layer portions, however, additionally requires a lithography step and an etching step. Further, as for lithography, the problem about the narrow space associated with an adjacent pattern and the problem about the misalignment with the source/drain diffusion layer portions may occur similarly as can be predicted.